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DTSTART;TZID=Europe/Prague:20250903T153000
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DTSTAMP:20260409T220944
CREATED:20250815T082948Z
LAST-MODIFIED:20250815T082948Z
UID:72385-1756913400-1756920600@passive-components.eu
SUMMARY:How to Choose Your Magnetic Supplier
DESCRIPTION:How to Choose Your Magnetic Supplier\n\nWed 03. 9.\n\n\n15:30 – 17:30 CEST\n\nChoosing the right magnetic supplier can define the success — or failure — of your project. \nIn this special 2-hour webinar\, we’ll bring together three perspectives from across the industry: \n\nSupplier selection & production insights: How to go from engineering requirements to mass production\, balancing cost\, regulatory compliance\, environmental footprint\, and supply chain risks.\nAdvanced magnetic materials expertise: Strategies for selecting soft magnetic materials in transformers\, inductors\, and filters for high-performance power electronics.\nReal-world manufacturer’s case study: See how a manufacturer used Frenetic Magnetic Simulator to design a component\, and how that design is now offered to the market.\n\nSpeakers: \n\nRafael Jiménez\, Systems Chief Engineer Electrification Expert\nFlorian Fenske & Jan Wanior from MB Electronics\nMagnetics Manufacturer\, leader in the industry (TBD)\n\nModerator: Dr. Chema Molina (CEO\, Frenetic)
URL:https://passive-components.eu/event/how-to-choose-your-magnetic-supplier/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20250916T170000
DTEND;TZID=Europe/Prague:20250916T180000
DTSTAMP:20260409T220944
CREATED:20250818T105706Z
LAST-MODIFIED:20250818T105706Z
UID:72392-1758042000-1758045600@passive-components.eu
SUMMARY:EMI Shielding Challenges
DESCRIPTION:EMI Shielding Challenges\nWebinar by Würth Elektronik\nTuesday\, September 16th 2025 @ 5:00PM CEST\n\nExplore modern EMI shielding techniques and learn how to prevent electromagnetic interferences (EMI) from impacting sensitive electronics. This webinar will dig into practical strategies in housing and PCB for mitigating EMI challenges\, never losing sight of solutions for emerging technologies like 5G\, IoT\, Industry IoT\, etc.\, and the challenge they bring to Electromagnetic Compatibility.
URL:https://passive-components.eu/event/emi-shielding-challenges/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20250916T200000
DTEND;TZID=Europe/Prague:20250916T210000
DTSTAMP:20260409T220944
CREATED:20250916T070117Z
LAST-MODIFIED:20250916T070117Z
UID:72573-1758052800-1758056400@passive-components.eu
SUMMARY:Reduce SMT Parasitic Design Failures with Innovative Filter Topologies
DESCRIPTION:Reduce SMT Parasitic Design Failures with Innovative Filter Topologies\n\nThis webinar explores strategies for optimizing SMT filter designs\, addressing spurious responses\, parasitic behaviors\, and PCB layout challenges using Cadence’s Microwave Office and Modelithics simulation models to ensure accurate and reliable performance. \n\n\n\nSeptember 16\, 8:00 PM — 9:00 PM CEST \n\n\n\n\n\nJoin our webinar to discover challenges and optimization strategies for designing reliable and efficient filters using SMT capacitors and inductors. A lumped prototype is monotonic in the stopbands\, while an SMT filter may have spurious responses\, which can be affected by topology changes and capacitor placement. Additionally\, simple S-parameter representations do not account for variations in parasitic behavior due to substrate thickness\, dielectric constant\, and solder pad dimensions. Ultimately\, PCB layout parasitics can lead to significant differences between simulations based on lumped prototype values and final measured results based on actual SMT component values\, leading to potential product delays and/or system failure. \n  \nLearn how to manage and modify spurious performances effectively through innovative SMT filter topologies. Gain insights into how PCB layout contributes to parasitic behaviors that affect your SMT component values. Understand how to enhance your design’s performance with Cadence’s Microwave Office software and highly accurate Modelithics simulation models\, ensuring your designs are right the first time. \n\n\n\n\n\n\n\n\n\nSpeakers \n\nDavid Vye\, Product Management Director\, Cadence \nDan Swanson\, Owner\, DGS Associates\, LLC \nChris DeMartino\, Applications Engineer\, Modelithics
URL:https://passive-components.eu/event/reduce-smt-parasitic-design-failures-with-innovative-filter-topologies/
LOCATION:virtual
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DTSTART;TZID=America/New_York:20250930T120000
DTEND;TZID=America/New_York:20251002T140000
DTSTAMP:20260409T220944
CREATED:20220909T111849Z
LAST-MODIFIED:20250728T071547Z
UID:58730-1759233600-1759413600@passive-components.eu
SUMMARY:MIL-Std-883 TM 2010
DESCRIPTION:MIL-STD-883 TM 2010\nInstructor: Thomas Green \nDescription: This course is an addendum to the Pre Cap Visual MIL-STD-883 TM 2017 inspection class (4 sessions) and its best to take that class first before registering for this one. TM 2010 contains the full inspection criteria for Class S and B monolithic microcircuits. TM 2010 Microcircuit visual inspection is a flow down requirement from Mil-Prf-38535. The primary focus of this session will be on the “low mag” visual requirements for component attach and wire bond\, which differ from the TM 2017 hybrid visual inspection criteria. TM 2010 also contains additional die attach and wire bond requirements not addressed in TM 2017. We will also briefly review the high mag inspection requirements for ICs and MMICs with a special emphasis on Class S products. \nTopics include: \n\nMil-Prf-38535 Integrated Circuit (Microcircuits) General Spec flow down\nrequirements for visual inspection\nLow Mag Criteria (30-60X)\nDie Attach(eutectic and non-eutectic criteria)\nWirebond General (gold ball\, wedge\, and tailless)\nRebonding of monolithic devices.\nFlip chip solder bump die (para 3.2.1.6)\nForeign material (para. 3.2.5)\nForeign Material Die Coated devices (para 3.2.5.1)\nHigh Mag Criteria (special emphasis on Class S)\nPara 3.1.1-3.4 High Mag IC and MMIC Inspection\nPara. 3.1.6. Film resistors\nPara 3.1.7 Laser trimmed thin film resistors\nFlip Chip Defects Scribe and Edge Cracks\nClass Review with Q&A
URL:https://passive-components.eu/event/mil-std-883-tm-2010/
LOCATION:virtual
CATEGORIES:TJGreen
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