BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Passive Components Blog - ECPv6.16.2//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:Passive Components Blog
X-ORIGINAL-URL:https://passive-components.eu
X-WR-CALDESC:Events for Passive Components Blog
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:Europe/Prague
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20250330T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20251026T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20260329T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20261025T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20270328T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20271031T010000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:20250309T080000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:20251102T070000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:20260308T080000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:20261101T070000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:20270314T080000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:20271107T070000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20260408T170000
DTEND;TZID=Europe/Prague:20260408T180000
DTSTAMP:20260519T205857
CREATED:20260401T105742Z
LAST-MODIFIED:20260401T105742Z
UID:75449-1775667600-1775671200@passive-components.eu
SUMMARY:Trade Secrets of the Flyback Converter
DESCRIPTION:Trade Secrets of the Flyback Converter: Theory and Simulation – by Chris Basso\n\n📅 April 8th \n🕔 5:00 PM (Spain / France) | 11:00 AM EDT | 8:00 AM PDT \n⏱️ Duration: 1 hour \n\n\n\nSimulation plays a critical role in power supply design\, but using it effectively requires more than just running models. \nIn this session\, Christophe Basso\, Business Development Manager at Future Electronics and author of Simulating Switching Converters with LTspice (2025)\, will share practical approaches to simulating switching converters using LTspice. With over 25 years of experience in power electronics and a long track record in developing PWM controllers and publishing technical books\, Christophe will guide you through how simulation can support real design decisions. \nThis session is especially relevant for engineers looking to strengthen their understanding of converter behavior through simulation and reduce uncertainty during the design process. \n  \nWhat we’ll cover \n\nHow to approach switching converter simulation using LTspice\nKey considerations when modeling real converter behavior\nCommon pitfalls when simulating power supplies\nHow simulation supports validation before hardware testing\nPractical insights based on real design experience
URL:https://passive-components.eu/event/trade-secrets-of-the-flyback-converter/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20260421T160000
DTEND;TZID=Europe/Prague:20260421T170000
DTSTAMP:20260519T205857
CREATED:20260216T081018Z
LAST-MODIFIED:20260216T081018Z
UID:74766-1776787200-1776790800@passive-components.eu
SUMMARY:Heatsink Solutions: Thermal Management in electronic devices
DESCRIPTION:Heatsink Solutions: Thermal Management in our electronic devices\nWürth Elektronik eiSos\n\nTuesday\, April 21st 2026 @ 4:00PM CEST\n\nThermal management is a challenge for any electronics designer. Among the possible solutions\, heatsinks are a key element that aids in heat dissipation. Combining them with thermal materials achieves optimal contact between the component and the cooling device. \nIn this webinar\, we’ll show you what a heatsink is for\, how to choose one\, and the importance of combining it with a thermal interface material.
URL:https://passive-components.eu/event/heatsink-solutions-thermal-management-in-electronic-devices/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20260422T170000
DTEND;TZID=Europe/Prague:20260422T173000
DTSTAMP:20260519T205857
CREATED:20260416T111954Z
LAST-MODIFIED:20260416T111954Z
UID:75595-1776877200-1776879000@passive-components.eu
SUMMARY:Magnetics in a high frequency GaN era
DESCRIPTION:Magnetics in a high frequency GaN era\nFrenetic Webinar \nWednesday\, April 22\, 5:00 PM – 5:30 PM \nGaN technology has pushed switching frequencies into the MHz range\, fundamentally changing the constraints on magnetic component design. \nAs AI data centers scale toward multi-100kW racks\, and even 1MW in the near horizon\, power architectures are evolving fast: fewer stages\, higher frequencies\, and increasing pressure on every component in the chain. \nBut what does this really mean for magnetics? \nIn this webinar\, our Power Electronics expert Sotiris Zorbas\, will examine the modeling requirements and common pitfalls in high-frequency power magnetics\, and how engineers can keep up with the pace of semiconductor innovation.
URL:https://passive-components.eu/event/magnetics-in-a-high-frequency-gan-era/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20260422T170000
DTEND;TZID=Europe/Prague:20260422T180000
DTSTAMP:20260519T205857
CREATED:20260416T082736Z
LAST-MODIFIED:20260416T082736Z
UID:75564-1776877200-1776880800@passive-components.eu
SUMMARY:Derating Tantalum\, Film\, and Ceramic Capacitors
DESCRIPTION:Designing for Reliability: Derating Tantalum\, Film\, and Ceramic Capacitors\nEvans Group Webinar \nWed\, Apr 22\, 2026 5:00 PM CEST\nProper capacitor derating is a foundational reliability practice in aerospace and defense electronics\, where component stress margins directly affect long-term performance and mission readiness.This webinar provides a practical review of derating guidelines for tantalum\, film\, and ceramic capacitors\, with emphasis on volage derating\, temperature effects\, ripple current limits\, and the interaction between electrical stress and failure mechanisms. Rather than broad rules of thumb\, the session focuses on how derating recommendations vary by dielectric system and construction\, and how those differences influence real-world design decisions. \n  \nAttendees will gain a clearer understanding of how to apply technology-specific derating strategies within high-reliability designs\, balancing performance\, size\, efficiency\, and risk.The discussion will include application considerations relevant to aerospace and defense environments\, helping engineers evaluate tradeoffs and implement defensible component selection criteria. \n  \nThis Grid webinar is presented by Misha Pierre-Mike\, Director of Business Development at the Evans Group.
URL:https://passive-components.eu/event/derating-tantalum-film-and-ceramic-capacitors/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20260427T150000
DTEND;TZID=Europe/Prague:20260427T160000
DTSTAMP:20260519T205857
CREATED:20260423T083949Z
LAST-MODIFIED:20260423T083949Z
UID:75652-1777302000-1777305600@passive-components.eu
SUMMARY:Commercial Space Screening Approach for Agile\, High-Reliability Payloads
DESCRIPTION:Commercial Space Screening Approach for Agile\, High-Reliability Payloads\nApril 27th at 15:00 CET \n\nAs the Space market evolves and accelerates\, mission designers need space-capable electronics that balance performance\, reliability\, and affordability\, without sacrificing speed to deployment.In this webinar\, we’ll explore ADI’s approach to supporting New Space programs through our purpose-built screening flows: Commercial Space Low (CSL) and Commercial Space High (CSH). Attendees will learn how these complementary screening paths deliver meaningful size\, weight\, and cost reductions compared to traditional space-grade solutions\, while maintaining confidence in reliability and capability. We’ll discuss how form\, fit\, and function compatibility across CSL\, CSH\, and standard commercial products enables flexible design choices tailored to diverse mission profiles and timelines. \nAttendees will also get the chance to preview ADI’s ongoing product development efforts aimed at advancing next-generation radio and radar payload capabilities for space applications. \n\n\n\n\nAgenda\n\n\n\n\n\nSection 1: Analog Devices (ADI) Company Overview\nSection 2: Space Capabilities & Product Development Strategy Overview\nSection 3: ADI Commercial Space Qualification Process & Flows\nSection 4: Summary of Recent Releases and Near-Term Developments
URL:https://passive-components.eu/event/commercial-space-screening-approach-for-agile-high-reliability-payloads/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Chicago:20260429T100000
DTEND;TZID=America/Chicago:20260429T110000
DTSTAMP:20260519T205857
CREATED:20260415T141334Z
LAST-MODIFIED:20260415T141334Z
UID:75544-1777456800-1777460400@passive-components.eu
SUMMARY:SEPIC Design Done Right
DESCRIPTION:SEPIC Design Done Right\nDigiKey\, Analog Devices and YAGEO webinar \nWednesday\, April 29\, 2026\, 10:00 AM CDT (1 hour) \nAs power architectures become more flexible and input voltages less predictable\, designers face growing pressure to deliver converters that can operate reliably across wide operating ranges without adding unnecessary complexity. SEPIC converters are often the topology of choice in these scenarios\, enabling non-inverting operation whether the input voltage sits above\, below\, or crosses the output\, but achieving a robust design requires far more than selecting the right topology. \nAs we delve into the intricate world of SEPIC converter design\, this event will focus on: \n\nUnderstanding electrical stress\, ripple current\, EMI\, and thermal performance: Discover how these critical factors intersect and impact your design choices.\nInductor coupling strategies and coupling capacitor behavior: Learn how these elements significantly influence efficiency\, noise\, and long-term reliability\, often becoming the limiting factors in production designs.\nPractical design constraints and component limitations: Gain insights into how real-world conditions shape SEPIC implementations and how to navigate these challenges effectively.\nAdvanced design tools: Explore the power of LTpowerCAD\, LTSPICE\, and the YSIM Capacitance Tool\, which can elevate the precision and reliability of your designs.\n\nNote: If you can’t attend the live webinar\, be sure to still register as we’ll send you the recording afterward! \nSpeakers: \nPiyu Dhaker\, Staff Applications Engineer\, Analog Devices\, Inc. \n\n\nPiyu Dhaker is a Staff Applications Engineer at Analog Devices\, specializing in power products. She holds a Master’s degree in Electrical Engineering from San Jose State University and has been with ADI since 2007. Her career spans a broad spectrum\, from developing test solutions for power management devices to providing application support to key automotive customers. In her current role\, she focuses on supporting broad-market power management applications. \nSimon Ruening\, Global Technical Marketing Manager\, Yageo Group \n\n\nSimon is a highly accomplished professional with a background in engineering and business. Currently serving as Technical Marketing Manager for YAGEO Group\, he combines technical expertise with strong problem-solving skills to provide valuable support to clients and drive successful implementations. With a BSEE from UTD and an MBA from UNT\, Simon has excelled in various roles\, including seven years as a design engineer. \nAlexander Nebel\, Technical Marketing Manager – EMEA\, Yageo Group \n\n\nAlexander is the Technical Marketing Manager in EMEA at YAGEO Group since the beginning of 2024. He worked as Field Application Engineer for more 15 years at different passive component manufacturers. Alexander started at KEMET Electronics in 2017 as Field Application Engineer and after the acquisition by YAGEO\, was responsible for all products of the YAGEO Group.
URL:https://passive-components.eu/event/sepic-design-done-right/
LOCATION:virtual
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Chicago:20260430T100000
DTEND;TZID=America/Chicago:20260430T110000
DTSTAMP:20260519T205857
CREATED:20260423T074315Z
LAST-MODIFIED:20260423T074315Z
UID:75645-1777543200-1777546800@passive-components.eu
SUMMARY:Programming Embedded Systems
DESCRIPTION:DigiKey and Microchip to Host Educational Webinar on Programming Embedded Systems\nFree webinar to introduce two ways of programming hardware \nThursday\, April 30\, 2026 at 10:00 CDT \noin us as we introduce embedded system design across software and hardware abstraction levels\, with a focus on when high-level code is sufficient and when dedicated hardware logic is required. You will gain practical insight into how modern embedded systems combine software control\, digital logic\, and hands-on hardware skills. \nParticipants will see demos using CircuitPython on a Microchip development board for rapid prototyping and hardware interaction\, along with a CLB / MiniFPGA kit. The CLB portion emphasizes combinational and sequential logic\, highlights scenarios where hardware logic is needed for timing and determinism\, and includes introductory soldering practice to connect logic design with real hardware. \nWhat you’ll gain from attending: \n\nUnderstanding software vs. hardware logic: Gain a clear perspective on when to utilize CircuitPython for rapid prototyping and when to turn to Verilog for hardware logic design.\nHands-on experience: Witness demos using a Microchip development board\, giving you practical insight into hardware interaction and rapid prototyping techniques.\nIntroductory soldering practice: Enhance your skills as we guide you through connecting logic design with real hardware\, providing an engaging way to understand embedded systems better.\nDigital design exposure: Dive into digital design with Verilog using CLBs (MiniFPGA)\, preparing you for real-world applications in coursework or projects.\nInnovative learning directions: Explore the exciting new directions Microchip is taking in enhancing student learning outcomes\, ensuring you stay ahead in your field.\n\nSpeakers: \nRoss Satchell\, Senior Engineer\, Microchip \n\n\nRoss is a Senior Engineer in Microchip’s Academic Program. He started out as a Maker developing coffee related Arduino projects including a PID temperature controller for espresso machines\, which led him to pursue a bachelor’s in computer engineering and a master’s in data analytics at ASU. He started at Microchip in 2019 and worked as a Technical Marketing Engineer developing engaging demos for trade shows and leading capstone teams for 5 years before moving to the Academic Program. He now develops academic focused development kits\, CircuitPython student workshops\, and works closely with professors to develop educational content. \nHani Ahmad Assi\, Senior Technical Staff Engineer\, Microchip \n\n\nHani is a Senior Technical Staff Engineer at Microchip Technology. He earned his PhD in Electrical Engineering from Arizona State University and brings over 15 years of industry experience and 8 years in academia\, with expertise in transistor-level mixed-signal circuit design. While at Microchip\, he coauthored a practical embedded computing book and is currently developing a SoC FPGA book based on the PolarFire SoC FPGA. He also serves on academic advisory boards for multiple universities and community colleges\, contributing to curriculum development\, new program creation\, technical content\, guest lectures\, workshops\, and capstone project mentoring.
URL:https://passive-components.eu/event/programming-embedded-systems/
LOCATION:virtual
END:VEVENT
END:VCALENDAR