The attendees of the 5th PCNS Passive Components Networking Symposium, held in Seville, Spain, from September 9 to 12, 2025, highly valued the conference’s high technical level and the opportunity for knowledge exchange among semiconductors, passive components, and the entire supply chain.
The PCNS Passive Components Networking Symposium is a bi-annual international symposium organized by the EPCI European Passive Components Institute in collaboration with an European university. The 5th edition of the PCNS Passive Components Networking Days Symposium, hosted by the Escuela Técnica Superior de Ingeniería de Sevilla of Universidad de Sevilla, Spain, in partnership with Alter Technology, was a live event.
The PCNS live event attracted 80 attendees from 17 countries, including Europe, the USA, Japan, China, and South Korea.
During the two and a half days of the PCNS event, 33 full technical papers were presented, covering a wide range of passive components, including capacitors, resistors, inductors, integrated passives, and smart textiles.
The conference theme, “Passive Components in Harsh Environment,” was elaborated in conference paper selection, keynotes, and workshops. It was further extended by a current hot topic panel discussion on the topic of AI development and its implications for passive electronic components.
The PCNS Technical Programme Committee (TPC) awarded The Best Paper and two Outstanding Papers to the selected nominees. The selection is based solely on the submitted material, including the abstract, full paper, and presentation.
Nomination list of the Awards – in appearance order:
- Keynote II Quality Challenges and Risk Mitigation for Passive Components in Harsh Environments; Antonio Rodriguez Arenas; ALTER Technology
- 2.7. Capacitor Degradation and Failure Mechanisms: Exploring Different Causes Across Technologies; Frank Puhane; Würth Elektronik
- 2.8. Beyond 85/85: Towards Realistic Lifetime Estimation of Polypropylene Film Capacitors in Humid Environments; Massimo Totaro; KEMET YAGEO
- AI 1. Revolutionizing the Defect Detention during the Cross-Sectional analysis for Electronics with Computer Vision; Mari Carmen López López, Fernando Romero, Carmen Galán; ALTER Technology
- 3.2. New construction and packaging process for highest voltage Aluminium polymer electrolytic capacitor; Tim Kruse; SDU Denmark
- 3.4. Revolutionizing High Frequency Applications: 3-Terminal XG3 Eulex Gap Capacitor; Alex Moalemi / Mark Simpson; Quantic Eulex
BEST PAPER AWARD
Title: New Construction and Packaging Process for Highest Voltage Aluminium Polymer Electrolytic Capacitor
Authors: Tim Kruse, Saykot Majumder, Luciana Tavares, Thomas Ebel
Department of Mechanical and Electrical Engineering, University of Southern Denmark, Sønderborg, Denmark
Keywords: Polymer Aluminium Electrolytic Capacitors, High Voltage Anodization, DC Link Capacitor, Capacitance Density, Electric Vehicles
Abstract:
Polymer aluminium electrolytic capacitors are notable for their high capacitance density, lower equivalent series resistance (ESR), and superior reliability compared to traditional liquid electrolyte capacitors. However, they are limited by their voltage capacity, with commercial devices typically capped at 200 V. This study presents an innovative construction and packaging process to achieve a rated voltage of 750 V. The process involves a novel high voltage anodization technique allowing the formation of oxides up to 1500 V. Aluminium anode foils were anodized and arranged in a parallel-stacked, fanlike cathode structure with paper separators, followed by impregnation inside an aluminium can.
The capacitors demonstrated high breakdown voltages of up to 835 V and a capacitance of 2 µF. Electrical performance was validated through leakage and ripple current tests. This research utilized flat aluminium foils, indicating significant potential for performance enhancement through increased surface area. The improved capacitance density suggests promising applications in DC link systems requiring high voltage and ripple current capacities, particularly in electric vehicle drivetrains where high ripple currents occur due to continuous acceleration and regenerative braking cycles.
OUTSTANDING PAPER AWARD
Title: Capacitor Degradation and Failure Mechanisms: Exploring Different Causes Across Technologies
Authors: Lukas Hölscher, Jon Izkue Rodriguez, Frank Puhane
Würth Elektronik eiSos GmbH & Coti KG, Max-Eyth-Straße 1, 74638 Waldenburg, Germany
Keywords: Capacitor degradation, failure mechanisms, MTBF, FIT rates, electrolytic capacitors, MLCC, supercapacitors, reliability prediction
Abstract:
Capacitors are critical yet failure-prone components in various electronic systems, particularly in power supplies and continuously operating power electronic equipment. This paper differentiates between two key concepts: capacitor degradation (or wear-out) and total failure. Degradation refers to the gradual deterioration of key characteristics like capacitance and equivalent series resistance (ESR), often accelerating under continuous stress. Total failure, quantified through statistical models such as Failure in Time (FIT) rates and Mean Time Between Failures (MTBF), may occur independently or as a result of degradation.
The paper analyzes the diverse causes of both degradation and failure across different capacitor technologies, including metallized film capacitors, electrolytic capacitors, multilayer ceramic capacitors (MLCCs), and supercapacitors. It highlights how environmental factors uniquely affect each technology, providing insights into reliability assessments and lifetime prediction models to enhance the durability of electronic systems.
OUTSTANDING PAPER AWARD
Title: High-Frequency Capacitor Performance of Novel Embedded Electrode Design
Authors: Alex Moalemi, Mark Simpson
Quantic Eulex, Monterey Park, CA, USA
Keywords: Embedded Electrode Capacitor, High-Frequency Performance, Low ESR, Low ESL, Impedance Matching, Decoupling, Filtering, 3-Terminal Capacitor, RF Applications
Abstract:
The escalating demands of high-frequency electronic systems, particularly in 5ti, radar, autonomous vehicles, and high-performance computing, necessitate capacitors that offer low inductance, high capacitance density, and robust stability across diverse conditions. This paper evaluates a novel capacitor architecture featuring an embedded electrode design coupled with coplanar terminals and single-layer construction. Testing up to 67 GHz demonstrates significant improvements in impedance matching, decoupling, and filtering applications compared to traditional MLCCs and SLCs, with notable reductions in Equivalent Series Resistance (ESR) and Equivalent Series Inductance (ESL).
The innovative design includes both 2-terminal and 3-terminal configurations, with the layer incorporating dedicated ground terminals for minimized parasitic inductance and enhanced stability under DC bias. Key performance advantages include ultra-low inductance (<15pH), high capacitance density, superior reliability, and extended broadband capabilities from kHz to tens of GHz.
Validation was conducted through rigorous testing by Bird Technologies, PMI, and Picotest. Results indicate improved Voltage Standing Wave Ratio (VSWR), gain ripple stabilization, reduced insertion and return losses, and superior power handling capabilities. Additionally, reliability assessments confirm operational stability under extreme voltage and temperature conditions.
These capacitors utilize Class I dielectrics like porcelain and NPO, characterized by high stability and low loss across -55°C to +125°C. The embedded electrode architecture represents a substantial advancement in high-frequency passive component technology, positioning it as a compelling alternative to conventional MLCCs and SLCs for demanding RF and high-speed digital applications.
All PCNS papers to be published on the passive-components.eu website under PCNS tag. The PCNS website link with complete program and information can be viewed here.
Thanks to our partners, sponsors and exhibitors that enabled this great event:
and the whole organizing team:
