TDK Power Integrity (PI) simulations aim reducing impedance of power-supply lines and the quantity of decoupling capacitors

By TDK Posted On 1.10.2018

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Source: TDK Technical Notes

This guide introduces TDK technical support using Power Integrity (PI) simulations aimed at reducing the impedance of power-supply lines and the quantity of decoupling capacitors necessary through the replacement of two-terminal Multi Layer Ceramic Capacitors (MLCCs) with low-ESL capacitors.

Recently, with enhancements of functionality and performance of electronic systems, the consumption current of ICs has been increasing. On the other hand, with the miniaturization of the internal structure of ICs due to increased functionality, its withstand voltage and power-supply voltage have decreased. With the decrease in the withstand voltage and power-supply voltage, it is becoming important to reduce voltage fluctuations. Therefore, the impedance [Z] needs to be reduced further to suppress voltage fluctuation.

Reducing impedance and decreasing the quantity of decoupling capacitors are needed further
With a decrease in power-supply voltage value, it is becoming more important to reduce the impedance of power-supply lines. The impedance of decoupling capacitors needs to be reduced in order to moderate voltage fluctuations. This guide introduces about number reduction in decoupling capacitors by replacement on low ESL capacitors to achieve such as the board size and the impedance characteristic which are asked in the severe restriction.

Decoupling capacitors for low-voltage/high-current power-supply lines
With the recent increase in the functionality and operation speed of electronic systems, Power Integrity (PI) of power-supply lines for digital ICs in the system is becoming important.
In order to enhance PI, it is important to reduce the impedance of the power-supply line as much as possible. For that reason, a lot of MLCCs are used in the power-supply line as decoupling capacitors.

However, with set miniaturization, restrictions on board size and mounting area are becoming tighter, and it is becoming difficult to mount the large number of MLCCs required to realize the desired impedance characteristics.

Impedance can be reduced by mounting multiple capacitors side by side.

Figure 1: Impedance frequency characteristic diagram based on number of MLCCs mounted in parallel

Currently, large quantities of decoupling capacitors are used

Issues: Large required quantities of capacitors, restricted mounting areas, increased costs (mounting costs)

Low impedance can be realized by fewer composition of Low-ESL capacitors

TDK recommends using low ESL-type capacitors to reduce the quantity of decoupling capacitors and total mounting area necessary. Low ESL-type capacitors themselves have a small inductance element (ESL) and realize low impedance over a broad range, including at high frequencies. Therefore, fewer low ESL-type capacitors are required to realize the impedance characteristics realized by using multiple normal-type capacitors.

Figure 2: Impedance Frequency Characteristics of Typical Low-ESL Capacitors

2-Temination typeESL：approx. 200～300pH (1005 size)

Low ESL type (Flip type)ESL：approx. 60～100pH (0510 size)

Low ESL type (3-Temination type)ESL：approx. 20～30pH (1005 size)

Figure 2: Impedance frequency characteristics of typical low-ESL capacitors. Low impedance can be realized by fewer composition of Low-ESL capacitors.

Comparison of the Impedance Frequency Characteristics Between 10 General Terminal Capacitors and 1 or 2 Low-ESL Capacitors

2-Termination type0.1μF_1005 sizex10pcs.

3-Termination type1μF_1608 sizex1pc.

Flip type1μF_0510 sizex2pcs.

Figure 3: Comparison of the impedance frequency characteristics between 10 general terminal capacitors and 1 or 2 low-ESL capacitors. Realizing low impedance with fewer low ESL capacitors

Also the board wiring patterns are part of electric circuits

In order to realize low impedance power-supply lines, not only are the optimum selection and configuration of decoupling capacitors important, but so is the design of the mounting board pattern. In mounting boards, resistance elements, parasitic inductance, and floating capacitance are present on the wiring conductor pattern and Via. Therefore, regarding the design of power-supply line impedance, the electrical elements of the board itself need to be included as impedance elements when designing the board pattern.

Cross-Sectional Image of a Mounting Board — <Cross-sectional image of a mounting board>

<Simplified circuit diagram in which board elements are not taken into account>

<Circuit diagram in which board elements are taken into account,realistic circuit diagram>

Figure 4: Image of a Circuit Between a General DC-DC Converter and an IC (Processor)

TDK can offer power-supply line impedance simulations which include board information

Power-supply design support using PI simulation

TDK provides technical support for designing optimum power-supply lines through verification based on PI simulations that incorporate mounting board information. Depending on the mounting board configuration, such as board type, mounting surface, and layouts of IC pins and peripheral parts, we propose optimum capacitor types, quantity and configuration, board wiring pattern, and layout, etc.

Figure 5: Implementation of PI simulation

Generally, the number of various restrictions increases through the course of board designing. Therefore, this support can be utilized most effectively at the time of initial verification, before designing the board pattern.

Even before launching fully into the design of board patterns, TDK may be able to perform verifications and make proposals regarding the number of MLCCs required as decoupling capacitors, and the allowable distance in cases where MLCCs cannot be placed near ICs.