On a Chip Energy Storage Capacitors
Posted On 18.7.2017
source: FEEC BUT and EPCI, Czech Republic, 18th July 2017
Energy Storing is one of the current hot topics within the electronic industry for a wide range of today’s and future applications. Faculty of Electrical Engineering and Communication with Central European Institute of Technology (CEITEC) in Brno University of Technology (BUT), Czech Republic and Institute of Sensor and Actuator System (ISAS) TU Wien, Austria are developing a micro-energy on chip storage technology for autonomous microsystems and energy harvesting.
Energy storage for MEMS harvesters integrated on a chip with specific circuitry would enable a wide range of possible applications such as wearables, medical life function monitoring, independent systems and sensors for safety, aerospace or automotive industry etc.
“Energy storage systems are one of the critical part of autonomous microsystems. On-Chip energy storage integration can be a very effective solution and condition for successful operation in many cases. It stores and source the energy to power whatever IC chip without connection losses right at the time without need for any extra space.” said Ass.Prof. Jaromir Hubalek senior researcher at FEEC and CEITEC BUT.
The current research and prototype device has fulfil capabilities to store energy charged very slowly from harvesters of power in μWs range. As a consequence, tailored materials and technologies for the realization of thin film capacitors compatible with CMOS are of utmost importance. Expected properties of these devices target capacitance values of tens of μF/cm2, low loss factor and low leakage currents. Current technologies offer low capacitance (MOS capacitor) or high leakage or the necessity to encapsulate an electrolyte for e.g. electrochemical supercapacitors, thus making the latter approach technologically most challenging.
The idea of energy storage on a chip is based on utilizing the back side of the silicon die (Fig.1 left). By exploiting the full chip area on back side deeply structured will help to create capacitors with enough high capacitance values. The proposed capacitor is suitable for integrated MEMS harvesters based on e.g. piezoelectric, thermoelectric and electrostatic approach. Due to their low output currents, ultra-low loss factors as well as leakage current levels need to be assured. To exploit a maximum in surface area the capacitor is based on porous materials and several techniques of metal oxide formation is studied. The one electrode of capacitor will be connected to the chip electronics, the second one with ground via package (Fig. 1 right).
The energy on chip project and its aims will be presented at the upcoming Passive Components Networking Days PCNS in Brno, the Czech Republic 12-15th September 2017.
