This paper was presented by Stephen Oxley, TT Electronics at the 3rd PCNS 7-10th September 2021, Milano, Italy as paper No.3.1. and voted by attendees as:
OUTSTANDING PAPER AWARD
The most cost effective and simplest way of converting a measured current to a voltage signal is to use a low ohmic value current sense resistor. The increase in products containing batteries, motors or actuators which call for current monitoring or control has led to huge growth in the market for current sense chip resistors with values below one ohm over the last two decades. But more recently, driven by power efficiency demands and enabled by low noise sense voltage amplifiers, the value range has been extended downwards from milliohms to hundreds of micro-ohms.
Such low ohmic values present challenges to the user at many stages in their design and manufacturing processes. This paper considers the nature of these challenges and suggests strategies to overcome them. The stages considered are component selection, PCB layout design, verification of the ohmic value of unmounted components, critical assembly processes, and expected ohmic values during product life. At each stage there are potential pitfalls but also opportunities to quantify and minimise error and variation.
Although sub-milliohm chip resistors are still just chip resistors, it is advisable to treat them as being a separate class of component, and to discover the particular considerations and techniques that enable their successful use.
CRITICAL ASSEMBLY PROCESSES
The assembly processes which are critical to achieving low mounting-related errors in ohmic value are solder paste printing, component placement and reflow.
Solder Paste Printing
The thickness of solder in the finished solder joint has a direct bearing on the mounted ohmic value. This is because the vertically resolved component of current flow through the solder joint, as shown in Figure 14a, is in a shared path with the voltage sense loop which connects at the upper surface of the copper PCB pad. It therefore follows that increased solder thickness, as shown in Figure 14b, will result in an increase mounted value.
The magnitude of this sensitivity may be estimated as follows, for a typical case.
ΔR/ΔL = 2ρ/A
Where
- ΔR is incremental increase in mounting offset (mounted measured value – probe measured value) (Ω)
- ΔL is incremental increase in solder thickness (m)
- ρ is the resistivity of the solder (Ωm)
- A is cross sectional area of the solder joint in the horizontal plane (m2)
For TT Electronics’ LRMAP2512-R0005FT4, 500µΩ ±1% in a 2512 footprint, the value of A is approximately 8.32mm2. For SAC305 alloy solder the value of ρ is 1.4 x 10-7 Ωm. The factor of 2 reflects the fact that there are two terminations.
This yields a sensitivity ΔR/ΔL = 33.7µΩ/mm.
A typical stencil thickness is 130µm, and this thickness of solder would be predicted to result in a mounted value increase of 4.4µΩ which is about 0.9% of the nominal value. Variations in solder thickness of around ±20% around this value would then result in mounted value changes of nearly ±0.2%. This is one reason why it is not realistic to expect a ±1% tolerance on mounted values from a ±1% tolerance resistor.
Figure 15 shows the results of a study looking at this sensitivity in the case of the example component referenced above. It yields a result of 28µΩ/mm which agrees broadly with the theoretical prediction. The fact that the empirical sensitivity is lower may be due to the fact that conduction through the solder fillet has been ignored, and accounting for this would involve increasing the effective area A.
The same analysis may be applied to other components by substituting the underside termination areas (A) relating to them. It is worth observing that large area and long-side terminations which are often provided for reasons of thermal management to improve the thermal contact to PCB tracks also have the benefit of lowering the sensitivity to variations in solder thickness.
Component Placement
The component placement positional accuracy of current pick & place systems based on aluminium platforms is in the range 50 to 100µm, reaching down to 20µm for steel platforms [2]. Once the trade-off between accuracy and speed is applied, chip components are commonly placed with around 80µm accuracy. This is perfectly adequate for normal resistors where mounting pad sizes are designed to accommodate this degree of variation.
However, for sub-milliohm chip resistors care should be taken to avoid an overhang of the termination on the interior edge of a mounting pad, beneath the component. This has the effect of bringing some current carrying termination inside the voltage sense loop, thereby raising the mounted value as shown in Figure 16a. This would apply where the gap between the mounting pads exactly equals the gap between the terminations. This potential problem may be overcome by making the gap between mounting pads smaller than that between the terminations by an amount commensurate with the magnitude of the placement accuracy. Figure 16b shows how the same degree of longitudinal placement error has no effect on mounted value when this has been done.
A practical study performed on TT Electronics’ LRMAP2512-R0005FT4 mounted on its recommended solder pads gave the results shown in Figure 17 indicating no correlation between mounting offset and longitudinal placement error up to about 100µm. This indicated no correlation and therefore no indication of placement error sensitivity.
A similar study on the effect of orientation angle errors also showed no sensitivity within the range ±2°. Transverse placement accuracy is not expected to cause issues provided the pad width is sufficient, and so has not been studied.
Reflow
The exposure to heat during the process of reflow can permanently affect the value of a resistor by altering the element material’s resistivity and this is normally established by initial testing by probed measurement and final testing by mounted measurement after reflow, to establish the value shift. However, with sub-milliohm resistors this is clearly problematic since, as we have seen, a number of factors can complicate the comparison in value between mounted and unmounted parts. The Resistance to Solder Heat test (e.g. 260°C ±5°C for 20s ±1s) for such resistors therefore tends to reflect the total value change due to a range of factors beyond the effect of heat exposure on the resistivity of the resistance element material.
If one wishes to study the effect of reflow on the element resistivity there are a number of approaches that may be used. The first is to de-solder mounted parts and measure the final value in the same probe fixture as used for the initial value measurements. Drawbacks of this approach are the presence of excess solder affecting the termination resistances and the fact that additional, uncalibrated heat exposure occurs during de-soldering. An alternative is to probe on the upper surface of the resistor terminations both before and after re-flow. This may not give the correct resistance value, depending on the degree of symmetry the resistor has about the horizontal plane, but for resistance change measurements that does not matter. However, the presence of the PCB tracks can still affect the resistance of the terminations. Possibly the best method is to perform a “dry” reflow whereby the components are simply sent through a reflow process in a heat-proof container. Since the test conditions before and after are now identical, any resistance changes which are statistically significant, allowing for the repeatability of the probe measurement, may be ascribed to alloy resistivity shift.
A practical issue that can arise when reflowing components with larger termination areas is that of voiding within solder joints. If this is severe it will have the effect of reducing the cross-sectional area of the joint and therefore increasing sensitivity to variations in solder thickness. Furthermore, there is the possibility of voids having a greater effect on mounted value if they occur in the vicinity of the voltage sense connection, as illustrated in Figure 18a.
Figure 18b shows an X-ray of one of the mounted parts used in this study which gave rise to concern that the mounted value might be affected. Other samples reflowed on a different line showed very low voiding levels as seen in figure 18c.
The analysis of results from ten parts is indicated below and showed no correlation with degree of voiding or with proximity to the theoretically sensitive location. It may be concluded that voiding below 20% is not found to be problematic in practice.
