Supercapacitor balancing system is required to avoid overloading of individual supercapacitor cell in series connection. Würth Elektronik technical article written by René Kalbitz explains some theoretical background of supercapacitor balancing methods and verify it is effectiveness in practical measurement and comparison. Published under Würth Elektronik permission.
Supercapacitors (SC) usually operate at low voltages of around 2.7 V. In order to reach higher operating voltages, it is necessary to build a cascade SC cells. [1] [2] Due to production or aging related variations in capacitance and insulation resistance the voltage drop over individual capacitors may exceed the rated voltage limit. Thus, a balancing system is required to avoid accelerated aging of the capacitor cell. [3] [4].
In the following, we want to explain the effect of unequal voltage division in such cascades in principle. To improve the under-standability we consider a series stack of two capacitors (note: any system may be reduced to an equivalent circuit of two capacitors.). In this note, we review the theoretical background and we provide some measurements as well as discussions on practical examples. The goal is to provide an overview on possible balancing strategies as well as an understanding of the explained concepts. The developer is invited to choose and adapt any strategy to meet specific requirements.
Content
- Balancing Theoretical Background
- Supercapacitors Balancing Strategies
- Measurements
- Summary – What is the Best Supercapacitor Balancing Method ?
Imbalance of Serial Connected Supercapacitors
A capacitor may be modeled by a parallel connection of an R-C unit and a insulation resistance. For the moment we neglect the insulation resistance and consider a series stack of two capacitors with capacities C1 and C2 – see Figure 1.
The conserved quantity in such a stack is the condensed charge q at the capacitor, i.e. at its internal interfaces. Using the conservation of charge V1,2 = q/C1,2 the voltage drop over each capacitor is:
with Vg = V1 + V2 as the total voltage. If both capacitance values are equal, the voltage at the terminals of two serial connected capacitors is equally:
Thus, the system is balanced and each capacitor is charged at its rated voltage Vr. In the following we may consider the case where C1 is larger than C2. With above equations it can be shown that the voltage drop at each terminal is unequal by:
With the voltage difference ∆V, which is in the following referred to as imbalance, we may write:
Using the definition of capacitance C = ∆q/∆V with q as charges at the capacitor interface and V as voltage at the capacitor), the above equation
may be rewritten as:
In order to adjust the voltage of each capacitor to Vr = V1 = V2 the charge has to be increased at capacitor 1 and decreased at capacitor 2 by the amount of ∆q. Using the definition of electrical current (I = dq/dt) the voltage may be written as:
The current I1,2 is interpreted as the electrical current that has to flow for a time period ∆t to equalize this system. The constant current that is required to equalize a voltage difference ∆V in a given time period ∆t is
Balancing Current and Balancing Time
We may use above equations for the estimation of the current magnitude. In this example we used the full tolerance range of the capacitance, which is 40% (-10%/+30%). Hence, for Cr = 10F we obtain C1 = 13F and C2 = 9F. The total voltage of 5.4V provides then a voltage difference ∆V = 0.49V (i.e. at C2 the voltage drop is V2 = 3.19V and at C1 the voltage drop is V1 = 2.21V). The ∆V ≈ 0.5V is the largest possible imbalance. To illustrate this situation, we use the circuit in Figure 1. The balancing current necessary to balance C1 and C2 within 1 sec respectively according to equation [11] are :
Hence, C1 needs to be charged with I1 = 6.5A and C2 needs to be discharged I2 = 4.5A. The current that has to be provided by the balancing terminal can be calculated with Kirchhoff’s current law. We may consider currents that flow out of the junction as negative and currents that flow into the junction as positive. Since I1 and I2 flow out of the junction and the balancing current I into the junction, the balancing current is:
I = 11A = 6.5A + 4.5A
Although the result may vary depending on ∆V and ∆t this example of calculation may show that balancing at the characteristic RC-time requires currents of several amperes. The balancing current, required to balance a strongly imbalanced system of ∆V = 0.5V ( as calculated above) in within ∆t can be estimated with:
So far we have neglected the insulation resistance, which starts to dominate the electrical behavior as soon as the SC is fully charged and the charging current becomes smaller than the leakage current Ileak. Most manufacturers specify a measurement time of 72h at rated voltage Vr to
determine Ileak. Under these conditions the capacitor may be simply modeled by an ohmic resistance Riso = Vr/Ileak. Hence, if a capacitor is fully charged a serial stack of SC may be considered as a stack of serial connected resistances, which constitute a voltage divider.
