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EMC Filters Design – from Component to Design

27.11.2025
Reading Time: 29 mins read
A A

This article and Wรผrth Elektronik webinar examines the fundamental principles of EMC filter design, from component-level characteristics through complete system integration, providing engineers with actionable insights for conducted emission mitigation in power electronics and communication systems.

Key Takeaways

  • This article explores EMC Filters Explained, focusing on design principles, component selection, and integration challenges.
  • It highlights the importance of understanding interference mechanisms, frequency-dependent parameters, and component behavior.
  • The article discusses various filter topologies, their effectiveness, and common filtering issues to avoid.
  • Practical design examples, such as RS-485 filtering, demonstrate real-world applications and simulation validation.
  • Key takeaways emphasize the need for careful component choice, layout optimization, and validation processes in filter design.

The presentation deal with the following topics:

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  • The need for filters and different topologies
  • Components and technologies
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  • How to destroy a filter

EMC Filters: From Component Selection to Practical Design

Electromagnetic compatibility (EMC) filter design requires systematic understanding of component behavior, filter topology, and practical implementation challenges.

1. Introduction

Electromagnetic interference (EMI) represents one of the most persistent challenges in modern electronic system design. As switching frequencies increase and circuit densities rise, conducted emissions from DC-DC converters, AC-DC power supplies, and high-speed digital circuits frequently exceed regulatory limits set by standards such as CISPR 22 and EN 55032

EMC filters are not merely collections of passive components enclosed in potting material; they are sophisticated frequency-selective networks whose performance depends critically on component selection, placement, and understanding of parasitic effects. A well-designed filter addresses both common-mode and differential-mode interference while maintaining signal integrity and meeting safety requirements.

This white paper presents a comprehensive approach to EMC filter design, drawing from practical engineering experience and measurement data to illustrate key principles. We examine why filters fail in real applications, how to select appropriate components based on frequency-dependent parameters, and proven techniques for optimizing filter performance.

2. Conducted Interference: Fundamentals and Frequency Ranges

2.1 Interference Mechanisms

Conducted electromagnetic interference propagates through electrical connections rather than radiating through space. The critical frequency boundary occurs at 30 MHz, below which cable-conducted emissions dominate, while above 30 MHz radiated emissions become significant. This transition reflects the wavelength relationship to typical conductor lengths in electronic systems.

For frequencies between 150 kHz and 30 MHz, regulatory testing focuses exclusively on conducted emissions measured at the equipment’s power input[page:1]. Efficient antenna formation requires conductor lengths approaching ฮป/4; below 30 MHz (ฮป > 10 meters), typical PCB traces and internal wiring remain electrically short, making radiation inefficient compared to conduction.

2.2 Common-Mode vs. Differential-Mode Noise

Understanding the distinction between common-mode and differential-mode interference is fundamental to effective filter design. Differential-mode noise appears as voltage differences between signal conductors, with currents flowing in opposite directions on line and return paths. Common-mode noise appears identically on all conductors relative to ground reference, with currents flowing in the same direction.

In power conversion applications, differential-mode currents typically originate from switching transitions in converter topologies, appearing at the fundamental switching frequency and harmonics. Common-mode currents arise from parasitic capacitances to ground and dV/dt across isolation barriers, manifesting predominantly at higher frequencies where capacitive coupling becomes significant.

CharacteristicDifferential ModeCommon Mode
Current DirectionOpposite on line/returnSame direction on all conductors
Primary Frequency RangeLower (fundamental and low harmonics)Higher (parasitic coupling dominant)
Typical AmplitudeLarger (mA to A range)Smaller (ฮผA to mA range)
Primary Filter ComponentX capacitors, differential chokesY capacitors, common-mode chokes

3. Filter Topologies and Component Placement

3.1 Basic EMI Filter Architecture

A practical EMI filter combines multiple filtering elements to address both interference modes. The canonical topology includes:

  • Common-mode choke: Coupled inductor providing high impedance to common-mode currents while allowing differential signals
  • Differential-mode chokes: Series inductors blocking high-frequency differential noise
  • X capacitors: Line-to-line capacitors shunting differential-mode interference
  • Y capacitors: Line-to-ground capacitors providing common-mode bypass paths

The effectiveness of each component varies dramatically with frequency and circuit impedance. X capacitors dominate differential-mode attenuation in lower frequency ranges, while Y capacitors become critical for common-mode suppression at higher frequencies.

3.2 Filter Order and Impedance Matching

Filter order, defined by the number of reactive components, directly determines the rejection slope: one reactive element provides 20 dB/decade attenuation, two elements yield 40 dB/decade, and three elements achieve 60 dB/decade. However, component placement relative to source and load impedance proves equally critical.

Starting with a series high-impedance element (inductor) works optimally when the source impedance is low, creating impedance mismatch that reflects noise back toward the source[page:1]. Conversely, starting with a shunt low-impedance element (capacitor) proves effective against high-impedance sources. The attenuation mechanism combines both dissipation in lossy components and reflection from impedance discontinuities.

The general design principle for maximizing filter effectiveness can be expressed mathematically as:

A total = A dissipation + A reflection

where the reflection component depends on the impedance mismatch ratio:

A reflection = 20 · log 10 ( | Z filter − Z source Z filter + Z source | )

4. Common-Mode Chokes: The Central Filter Component

4.1 Operating Principle and Magnetic Coupling

The common-mode choke represents the most sophisticated component in EMC filter design due to its ability to discriminate between wanted differential signals and unwanted common-mode noise. This selectivity arises from the magnetic coupling between windings on a shared ferromagnetic core.

Perfect symmetry between windings creates complete magnetic flux cancellation for differential-mode currents. When equal currents flow in opposite directions (differential mode), they generate magnetic fluxes of equal magnitude but opposite polarity, resulting in zero net core magnetization. Without core magnetization, no inductance appears, and differential signals pass with minimal impedance.

For common-mode currents flowing in the same direction, magnetic fluxes add constructively, saturating the ferromagnetic core and creating maximum inductance. This inductance generates high impedance that dissipates or reflects common-mode noise while allowing differential signals to pass unimpeded.

4.2 Core Materials and Frequency Response

Core material selection fundamentally determines the frequency characteristics of common-mode chokes. The complex permeability

μ = μ‘ − j μ”

describes both flux-conducting ability (real part of ฮผ) and loss characteristics (imaginary part of ฮผ).

Three primary material families serve different frequency ranges:

Core MaterialEffective Frequency RangeKey CharacteristicsTypical Applications
Manganese-Zinc Ferrite10 kHz – 1 MHzHigh permeability, moderate lossesPower supply filters, lower frequency EMC
Nickel-Zinc Ferrite1 MHz – 100 MHzLower permeability, high lossesHigh-frequency EMC, RF suppression
Nanocrystalline10 kHz – 10 MHzVery wide bandwidth, excellent temperature stability, Curie temp >600ยฐCWide-bandwidth filtering, harsh environments

For power inductor applications, engineers typically operate one decade below the resonant frequency to minimize core losses and maintain efficiency. EMC choke design inverts this principle: maximum losses occur precisely where filtering is required, making “poor” power inductor materials ideal for EMC applications.

4.3 Winding Styles and Parasitic Effects

Winding configuration significantly impacts both common-mode performance and differential-mode rejection. Two primary styles exist:

Bifilar winding: Both conductors wound together simultaneously, providing maximum symmetry and minimal differential-mode leakage inductance. The tight coupling results in excellent common-mode attenuation with negligible differential-mode impedance.

Sectional winding: Windings placed in separate sections of the bobbin, creating intentional asymmetry. This reduced symmetry generates significant leakage inductance, providing substantial differential-mode attenuation in addition to common-mode suppression.

The leakage inductance Lleak in sectional windings arises from imperfect magnetic coupling and can be estimated as:

L leak ≈ L nominal · ( 1 − k 2 )

where k represents the coupling coefficient (k = 0.999 for bifilar, k โ‰ˆ 0.95-0.98 for sectional).

5. Component Selection Methodology

5.1 Beyond Inductance Value: Frequency-Dependent Parameters

Specifying a common-mode choke solely by inductance value (e.g., “1 mH”) provides insufficient information for filter design. The inductance measurement at low frequency (typically 1 kHz or 100 kHz) indicates only the initial slope of the impedance curve, revealing nothing about behavior in the critical EMC frequency range.

Effective component selection requires examining the complete impedance-versus-frequency characteristic, which encompasses:

  • Low-frequency inductance region (inductive reactance dominates)
  • Mid-frequency loss region (core losses create resistive impedance)
  • High-frequency capacitive region (inter-winding capacitance creates resonance)

The impedance magnitude |Z| of a choke can be approximated across frequency as:

| Z (f) | ≈ 2 π f · L eff 2 + R loss 2

where Leff decreases with frequency as the core permeability drops, and Rloss increases due to core losses in lossy ferrite materials.

5.2 Rated Current and Thermal Considerations

The rated current specification for common-mode chokes reflects thermal limits rather than magnetic saturation. Manufacturers typically specify rated current as the DC current (flowing through both windings simultaneously) that produces a defined temperature rise, commonly 40K above ambient.

This measurement methodology ensures the rated value directly corresponds to application conditions. Derating curves extend operation to elevated ambient temperatures; for instance, operation at 90ยฐC ambient might require derating to 80% of the rated current to prevent exceeding the maximum operating temperature of 125-140ยฐC.

5.3 Saturation in Common-Mode Applications

Unlike differential-mode inductors, common-mode chokes exhibit negligible saturation concerns in typical applications. The field cancellation mechanism means differential-mode currents (which may be several amperes) do not magnetize the core significantly.

Common-mode currents remain in the microampere to milliampere range in properly designed systems. A choke might show 20% inductance loss (conventional saturation definition) at only 5 mA common-mode current, yet this poses no practical limitation since normal common-mode currents remain far below this level. Any system with multi-milliampere common-mode currents exhibits serious imbalance problems beyond simple EMC concerns.

6. Capacitor Selection and Safety Considerations

6.1 X Capacitors: Differential-Mode Filtering

X capacitors connect line-to-line (or line-to-neutral) and provide low-impedance shunt paths for differential-mode noise. Their effectiveness increases with frequency as capacitive reactance decreases according to:

X C = 1 2 π f · C

X capacitor selection involves balancing several requirements:

  • Capacitance value: Larger values provide better high-frequency attenuation but increase standby power consumption and discharge resistor losses
  • Voltage rating: Must exceed peak line voltage with adequate safety margin
  • Safety class: X1 (โ‰ค4 kV impulse) or X2 (โ‰ค2.5 kV impulse) classification per IEC 60384-14
  • Discharge requirements: Regulations mandate X capacitors discharge to safe voltages (<50V) within specified times after disconnection, necessitating parallel discharge resistors

6.2 Y Capacitors: Common-Mode Filtering and Leakage Current

Y capacitors connect line-to-ground and provide essential common-mode noise bypass paths. However, their usage faces strict limitations due to safety ground leakage current concerns. Even at line frequency (50/60 Hz), Y capacitors conduct leakage current:

I leakage = V line · 2 π f · C Y

where CY represents the total Y capacitance to ground.

Safety standards (IEC 60950, IEC 60065, IEC 60335) limit leakage currents to prevent shock hazards if ground connections fail. Medical equipment faces particularly stringent limits (typically <100 ฮผA). These constraints restrict Y capacitor values, often limiting total Y capacitance to 2-4.7 nF for 230V applications.

Y capacitor safety classification (Y1, Y2, Y3, Y4) depends on insulation requirements and rated impulse voltages per IEC 60384-14. Class Y2 (โ‰ค5 kV impulse) serves most consumer and industrial applications, while Class Y1 (โ‰ค8 kV impulse) addresses reinforced insulation requirements.

7. Practical Filter Design Example: RS-485 Interface Protection

7.1 Design Requirements and Constraints

Consider designing an EMC filter for an RS-485 communication interface with the following specifications:

  • Line impedance: 60ฮฉ per conductor (120ฮฉ differential)
  • Maximum cable length: 1.2 km
  • Signal bandwidth: DC to 15 MHz
  • Required common-mode attenuation: Sufficient to meet EMC standards starting at 62.5 kHz
  • Maximum acceptable differential-mode attenuation: 3 dB at 15 MHz

The 1.2 km cable length creates an efficient antenna at approximately 62.5 kHz (ฮป/4 โ‰ˆ 1200m for 62.5 kHz). Common-mode noise coupling to this cable antenna motivates the filter design.

7.2 Component Calculations

The 3 dB differential-mode attenuation limit at 15 MHz constrains the total differential-mode capacitance. For a ฯ€-filter topology with impedance Z0 = 120ฮฉ, the maximum differential-mode capacitance can be calculated from:

A diff ( dB ) = 20 · log 10 ( | 1 + Z 0 2 X C | ) ≤ 3  dB

Solving for capacitance at f = 15 MHz:

C diff,max = 1 2 π f · Z 0 ( 10 A / 20 − 1 ) ≈ 181  pF

This constraint must account for all differential-mode capacitances:

  • X capacitors (intentional)
  • TVS diode junction capacitance
  • Y capacitor differential-mode component (Y capacitors exhibit differential-mode impedance despite ground connection)

For the example design, selecting X capacitors and considering parasitic contributions yields total differential-mode capacitance of 178 pF, safely below the 181 pF limit.

7.3 Simulation and Validation

LTSpice simulation using manufacturer-provided component models including parasitic elements produces attenuation curves closely matching measured filter performance. The simulation workflow includes:

  1. Import component models with parasitic inductances, resistances, and capacitances
  2. Construct filter schematic with appropriate source and load impedances
  3. Perform AC analysis sweeping from 10 kHz to 100 MHz
  4. Extract common-mode and differential-mode insertion loss
  5. Compare simulation to measured performance using network analyzer

The design example achieved excellent agreement between simulation and measurement for differential-mode performance, with some deviation in common-mode response due to component tolerances and layout parasitics.

8. Common Filter Design Failures

8.1 Incorrect Component Placement

The most frequent filter failure mechanism involves improper placement relative to noise sources. Consider a typical power supply input path:

AC Inlet โ†’ Mains Switch โ†’ EMC Filter โ†’ AC-DC Converter

If the switch precedes the filter, the wiring between inlet and switch acts as an unfiltered noise coupling path. Inductive coupling between pre-filter and post-filter wiring creates a parasitic bypass around the filter’s high impedance, dramatically reducing effectiveness.

The coupling impedance Zcoupling between parallel conductors separated by distance d and with length l can be approximated as:

Z coupling ≈ j · 2 π f · M

where the mutual inductance M โ‰ˆ 0.2 ร— l ร— ln(d/r) nH for typical geometries. Even modest coupling creates low-impedance noise paths bypassing the filter.

Best practice: Place filters immediately at the enclosure entry point, keeping input and output wiring physically separated and minimizing parallel runs.

8.2 Filter Input/Output Feedback

Routing filter input and output conductors in parallel or in close proximity creates capacitive and inductive coupling that bypasses the filter’s intended isolation. This feedback mechanism effectively shorts out the filter at high frequencies where coupling impedances become significant.

Measurements show that parallel input/output routing can reduce filter effectiveness by 20-40 dB above 10 MHz. Orthogonal routing or physical shielding between input and output sections prevents this degradation.

8.3 Layout Parasitics

PCB trace inductance significantly impacts capacitor effectiveness. A capacitor intended to provide low-impedance shunt paths to ground becomes ineffective if connected through long traces whose inductive reactance dominates:

Z total = j · 2 π f · L trace + 1 j · 2 π f · C

At the self-resonant frequency:

f 0 = 1 2 π L C

, the impedance reaches a minimum. Above f0, inductive reactance increases and capacitor effectiveness degrades. A 1 nF capacitor with just 10 nH of trace inductance resonates at only 50 MHz, providing reduced bypassing at higher frequencies.

Mitigation strategies include:

  • Minimizing trace lengths to bypass capacitors
  • Using wide traces or planes for ground connections
  • Placing capacitors as close as possible to connection points
  • Employing multiple capacitors in parallel (different values) to extend frequency coverage

8.4 Incorrect Mode Filtering

Attempting to filter differential-mode noise with common-mode chokes, or vice versa, yields poor results. Some designers incorrectly substitute two separate inductors for a common-mode choke, expecting similar performance. However, uncoupled inductors provide only leakage inductance benefit (typically <1% of nominal inductance) for common-mode suppression, reducing effectiveness by 40 dB or more.

Proper filter design requires identifying the dominant interference mode through measurement (using current probes or LISNs) and selecting appropriate components.

9. Advanced Design Considerations

9.1 Complete Filter Solutions: CLFS Product Family

Integrated filter modules combine optimized component selection, controlled layout, and safety certifications in compact packages. These assemblies offer three primary topologies:

Single-stage: One common-mode choke, one X capacitor, two Y capacitors โ€“ basic filtering for lower attenuation requirements

Advanced single-stage: Additional X capacitor improves differential-mode performance without increasing volume significantly

Two-stage: Two common-mode chokes with intermediate and output X capacitors โ€“ maximum attenuation for demanding applications, 40-80 dB additional suppression versus single-stage

The design tradeoff involves balancing rated current against inductance and capacitance values. Higher rated current requires thicker wire, reducing the number of turns possible in a given core size and consequently reducing inductance. This inductance reduction can be partially compensated by increasing Y capacitance (within leakage current limits) to maintain common-mode attenuation.

9.2 Measurement and Characterization

Historical practice measured filter attenuation at 50ฮฉ source and load impedance due to network analyzer limitations. Modern characterization employs S-parameter measurements with variable impedance transformation, enabling accurate prediction of filter performance under actual application impedances.

Online tools like REDEXPERT allow engineers to enter actual source and load impedances, calculating expected filter attenuation based on measured S-parameters. This approach dramatically improves design accuracy compared to assuming 50ฮฉ impedances that rarely match real applications.

9.3 Environmental Effects: Temperature and Potting

Core material temperature coefficients significantly affect filter performance across operating temperature ranges. Manganese-zinc ferrite exhibits moderate temperature sensitivity with Curie temperatures of 140-180ยฐC, showing impedance variations of ยฑ20-30% from -40ยฐC to +125ยฐC.

Nanocrystalline materials demonstrate exceptional temperature stability, maintaining nearly constant impedance from -40ยฐC to +180ยฐC with Curie temperatures exceeding 600ยฐC. This stability proves critical for automotive and industrial applications experiencing wide temperature excursions.

Potting compounds encapsulating filter assemblies can mechanically stress ferrite cores during thermal cycling. Low-quality ferrites may exhibit core fracture or significant permeability changes under mechanical stress, degrading filter performance or causing complete failure. Specifying high-quality core materials with robust mechanical properties prevents these failures.

10. Conclusion

Effective EMC filter design transcends simple component selection, requiring systematic understanding of noise mechanisms, frequency-dependent component behavior, and practical implementation considerations. Key principles for successful filter implementation include:

  1. Characterize the interference: Identify whether common-mode or differential-mode noise dominates, and determine the frequency range requiring attenuation
  2. Select components by frequency response: Inductance values alone provide insufficient information; impedance-versus-frequency curves reveal actual performance
  3. Consider parasitic effects: Real components exhibit capacitances, resistances, and layout-dependent inductances that fundamentally alter filter behavior above 1 MHz
  4. Optimize placement: Position filters at enclosure entry points, separate input/output wiring, and minimize trace inductances to bypass capacitors
  5. Validate through simulation and measurement: Use circuit simulation with parasitic-inclusive models, then verify performance with network analyzer measurements under actual impedance conditions

Modern EMC filter design tools, including S-parameter-based characterization and impedance-variable simulation platforms, enable engineers to achieve first-pass design success. Combined with structured design methodology and awareness of common failure modes, these tools reduce development time while producing optimized, cost-effective filtering solutions.

As switching frequencies continue to increase and EMC regulations become more stringent, disciplined filter design methodology becomes not merely advantageous but essential for product success. The investment in proper component selection, layout optimization, and validation yields substantial returns through reduced certification time, lower production costs, and enhanced product reliability.

FAQ: EMC Filters โ€“ From Component to Desig

Why are EMC filters needed in power and signal designs?

EMC filters are needed because switching converters and digital circuits generate conducted and radiated interference that can cause failed compliance tests, malfunction of nearby devices, and poor system reliability.

What are the typical components used in an EMI filter?

A typical mains EMI filter contains at least one common-mode choke, differential-mode chokes or inductors, X capacitors between lines, and Y capacitors from line to earth, combined to attenuate both common-mode and differential-mode noise.

What is the difference between common-mode and differential-mode noise?

Differential-mode noise flows in opposite directions in the two conductors and is mainly suppressed by series inductors and X capacitors, while common-mode noise flows in the same direction in both conductors and is mainly suppressed by common-mode chokes and Y capacitors.

Why is the placement of the EMI filter so critical?

Incorrect placement can create unintended low-impedance coupling paths between input and output wiring, allowing noise to bypass the filter through inductive or capacitive coupling and leading to poor attenuation despite a good schematic.

How does a common-mode choke behave for wanted signals?

For the intended differential signal, the magnetic flux of the two windings cancels in an ideal common-mode choke, so the differential-mode inductance is only the small leakage inductance and the useful signal passes with minimal attenuation.

How do core materials influence the frequency behavior of chokes?

Iron powder, manganese-zinc ferrite, nickel-zinc ferrite, and nanocrystalline cores offer different permeability and loss versus frequency, which determines the useful attenuation band and temperature stability of both common-mode and differential-mode chokes.

Why is 1mH not always the same in EMC filter design?

Two chokes with the same nominal inductance can have very different impedance curves and attenuation because winding style, parasitic capacitances, core material, and temperature behavior strongly affect the high-frequency performance.

What are common mistakes that can โ€œdestroyโ€ an EMI filter?

Typical mistakes include using the wrong filter order, placing capacitors behind long inductive traces, routing input and output in parallel, relying on capacitors instead of inductors for low-frequency noise, and ignoring component saturation or parasitics.

How can engineers prototype and tune EMC filters?

This webinar presents a modular EMC filter design kit and simulation models, which allow engineers to assemble different topologies, test them in the real application, and correlate measurements with SPICE-based simulations to converge on a compliant design.

How-to: Design and Implement an Effective EMC Filter

  1. Step 1 โ€“ Identify EMI sources and limits

    Determine the main switching frequencies, harmonics, and relevant EMC standards for your product, focusing on conducted emissions between 150ย kHz and 30ย MHz and radiated emissions above 30ย MHz.

  2. Step 2 โ€“ Separate common-mode and differential-mode needs

    Analyze whether failing frequencies are dominated by common-mode or differential-mode currents so you can size common-mode chokes, differential-mode inductors, and capacitors appropriately.

  3. Step 3 โ€“ Select core materials and choke types

    Choose core materials such as manganese-zinc ferrite or nanocrystalline for common-mode chokes to obtain high losses in the noise band, and select suitable iron powder or ferrite cores for differential inductors with adequate saturation margin.

  4. Step 4 โ€“ Define X and Y capacitors

    Calculate X capacitors for differential-mode attenuation at the lowest problematic frequencies and choose Y capacitors to boost common-mode attenuation while keeping leakage current within the limits of safety standards like IECย 60939.

  5. Step 5 โ€“ Check attenuation versus insertion loss

    Evaluate filter transfer functions in SPICE or vendor tools, ensuring that the insertion loss at the wanted signal or mains frequency stays within acceptable limits while providing sufficient attenuation in the rejection band.

  6. Step 6 โ€“ Optimize PCB layout and wiring

    Place the filter close to the connector, keep input and output conductors physically separated, minimize loop areas, and avoid routing input and output in parallel to reduce unintended inductive or capacitive coupling paths.

  7. Step 7 โ€“ Prototype with a configurable filter board

    Use an EMC filter design kit or modular PCB to combine different chokes and capacitors, then measure conducted emissions to validate whether the chosen topology meets margin goals across the full frequency range.

  8. Step 8 โ€“ Verify thermal behavior and saturation

    Confirm that common-mode and differential-mode chokes operate below their rated current and temperature derating curves so that inductance and attenuation do not collapse during worst-case load and ambient conditions.

  9. Step 9 โ€“ Iterate based on EMC test results

    If pre-compliance or final lab tests reveal residual peaks, refine the filter order, adjust component values, or change core material and layout until the emissions remain below limits with comfortable design margin.

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Source: Wรผrth Elektronik

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Space and Military Standards for Hybrids and RF Microwave Modules

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Designing Qi2 Wireless Power Systems: Practical Development and EMC Optimization

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