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    Best Practices for Cable Management in High-Speed and High-Density Systems

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Ceramic Capacitors Loss Modelling under High DC Bias Voltage and High Current Stress

24.8.2022
Reading Time: 1 min read
A A

prof. Sam Ben-Yaakov in his video suggests way of modelling and LTSpice simulation of ceramic ferroelectric capacitors (such as BaTiO3 X7R MLCC most common types) under high DC BIAS Voltage and high capacitor current stress.

References

RelatedPosts

Ripple Steering in Coupled Inductors: SEPIC Case

Coupled Inductors in SEPIC versus Flyback Converters

Non-Linear MLCC Class II Capacitor Measurements Challenges

  • S.Ben-Yaakov – Ferroelectric ceramic capacitors: There is more than meets the eye – Ferroelectric Ceramic Capacitors Explained (passive-components.eu)
  • S. Ben-Yaakov, “Some Observations on Loss and Hysteresis of Ferroelectric-Based Ceramic Capacitors,” in IEEE Transactions on Power Electronics, vol. 33, no. 11, pp. 9127-9129, Nov. 2018.
  • D. Menzi, D. Bortis, G. Zulauf, M. Heller and J. W. Kolar, “Novel iGSE-C Loss Modeling of X7R Ceramic Capacitors,” in IEEE Transactions on Power Electronics, vol. 35, no. 12, pp. 13367-13383, Dec. 2020. H. Haag, F. Haemmerle and S. Ben-Yaakov, “Voltage Bias Effect on the ESR of Ferroelectric Ceramic Capacitors,” PCIM Europe digital days 2020; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, 2020, pp. 1-6.

other DC BIAS ageing reference published on passive-components.eu can be found here: MLCC DC BIAS Ageing

Related

Source: prof. Sam Ben-Yaakov

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