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High-Frequency Ceramic Capacitor Performance of Novel Embedded Electrode Design

23.9.2025
Reading Time: 5 mins read
A A

The paper “High-Frequency Capacitor Performance of Novel Embedded Electrode Design” was presented by Mark Simpson, Quantic Eulex, Monterey Park, CA, USA, at the 5th PCNS Passive Components Networking Symposium 9-12th September 2025, Seville, Spain as paper No. 3.4.

This paper was selected and awarded by TPC Technical Program Committee as the:

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OUTSTANDING PAPER AWARD


Introduction

The article explores the high-frequency performance of a novel capacitor architecture featuring an embedded electrode design. As electronic systems evolve in areas such as 5G, radar, autonomous vehicles, and high-performance computing, capacitors must meet stricter requirements for low inductance, high capacitance density, and consistent stability across broad temperature, voltage, and frequency ranges. Conventional capacitor technologies, including Single-Layer Capacitors (SLCs) and Multilayer Ceramic Capacitors (MLCCs), face challenges with parasitic elements like ESR and ESL, which degrade performance at high frequencies. This study investigates a new embedded electrode solution designed to overcome these limitations while ensuring robust high-frequency performance up to 67 GHz.

Key Points

  • Conventional capacitors face limitations in high-frequency applications due to parasitic inductance and mechanical vulnerabilities.
  • The novel capacitor design features a coplanar, partially embedded electrode and single-layer construction, minimizing ESR and ESL.
  • Two configurations are evaluated: a 2-terminal variant and a 3-terminal variant with dedicated ground terminals.
  • Testing by Bird Technologies, PMI, and Picotest demonstrated improved impedance matching, lower VSWR, higher Q-factor, and ultra-low inductance (~15 pH).
  • Reliability testing confirmed stability across extended temperature ranges and high-voltage conditions.
  • The new capacitors can replace multiple MLCCs, simplify designs, and improve performance in RF and high-speed digital environments.

Extended Summary

Modern high-frequency electronic systems demand capacitors that can simultaneously provide low parasitic elements and high performance under varying operating conditions. Conventional SLCs offer low ESR and high self-resonant frequencies but have low capacitance and limited mechanical robustness. MLCCs offer higher capacitance at the expense of higher ESR, lower SRF, and susceptibility to mechanical stress or thermal cycling. These shortcomings often lead to degraded performance in high-speed computing and RF applications, where parasitic inductance can cause capacitors to act as unintended inductors under high-frequency conditions.

The novel embedded electrode capacitor design presented in this study addresses these limitations. It incorporates a coplanar electrode configuration where one electrode is partially embedded within the dielectric, reducing effective spacing, increasing capacitance density, and lowering parasitic inductance and resistance. The single-layer construction eliminates the need for wire bonds and vias, both of which are primary sources of parasitic inductance and mechanical failure. The capacitors are available in two configurations: a 2-terminal variant optimized for high-frequency performance and a 3-terminal variant that includes dedicated ground terminals to further minimize current loop area and ESL.

Independent testing by several organizations validated the capacitor’s superior performance. Bird Technologies evaluated the 3-terminal design within a Grounded Coplanar Waveguide (GCPW) structure, observing exceptional low-frequency performance, high stability, and robust impedance characteristics over temperature. PMI integrated the 3-terminal solution into a Low Noise Amplifier (LNA) and a High-Pass Filter, resulting in notable reductions in VSWR (from 3.3:1 to 2.3:1), improved gain ripple, and enhanced filter characteristics. These improvements translated to higher return loss, lower insertion loss, and increased power handling from 1 W to 50 W in certain applications.

Picotest testing further confirmed the ultra-low inductance characteristics of the new design, successfully measuring inductance values as low as 15 pico-Henries, a significant improvement over the ~200 pH typical of MLCCs. This low inductance facilitates improved power integrity, RF coupling, and minimal signal reflection, making the component suitable for microwave and millimeter-wave applications. Reliability testing demonstrated stability under double rated voltage at 125°C for over 7,000 hours, and no failures in humidity testing, highlighting robustness for demanding environments.

The capacitors use Class I dielectrics like porcelain and NPO, which provide high Q, low loss, and minimal capacitance drift (0 ±30 ppm/°C) over a wide temperature range (-55°C to +125°C). Applications validated during testing include DC blocking, bias line filtering, impedance matching, and high-performance RF filtering, all critical in modern high-frequency, high-speed designs.

Conclusion

The embedded electrode capacitor architecture significantly advances high-frequency passive component design. Offering ultra-low inductance, high capacitance density, exceptional stability, and robust reliability, these capacitors present a compelling alternative to traditional SLCs and MLCCs. Their ability to simplify designs, reduce component counts, and sustain high-frequency performance up to 67 GHz positions them as an effective solution for RF, microwave, and next-generation digital applications requiring superior signal integrity and power handling.

3_4_Eulex PCNS PaperDownload

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Source: PCNS

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