Electrostatic Capacitors: Construction and Selection

Electrostatic capacitors store energy in an electric field between electrodes separated by a dielectric. This article explains how stacking, winding, dielectric selection, metallization and termination design affect capacitance, voltage capability and reliability, with particular attention to metallized-film pulse applications. It provides construction and selection guidance for design, component and purchasing engineers.

Key Takeaways

Capacitor construction determines more than nominal capacitance: it also affects current paths, dielectric stress, losses and the way local defects develop.

Stacking and winding use both sides of internal electrodes to increase active area within a compact volume; comparisons require the same electrode area, dielectric spacing and material.
Reducing dielectric thickness increases capacitance but raises electric field at a given voltage. In the ideal parallel-plate model, increasing thickness fivefold while retaining capacitance requires twenty-five times the active dielectric volume.
Metallized-film construction saves electrode volume and enables self-healing, but the thin electrodes and their end contacts impose current and pulse limits.
Self-healing isolates a local dielectric defect by removing surrounding metallization. Repeated clearing or segment disconnection reduces capacitance and does not justify operation beyond the specified ratings.
For pulse and power applications, compare voltage, voltage slope, peak current, RMS current, repetition rate, temperature and cooling together. A DC voltage rating alone is insufficient.
For ceramic capacitors, compare capacitance under the actual bias and temperature conditions. For mains interference suppression, select appropriately approved safety capacitors rather than ordinary parts with a similar voltage rating.

Electrostatic Capacitors: Construction & Assembly

Here, electrostatic capacitors means conventional dielectric capacitors such as ceramic, plastic-film and paper types. This is a practical technology grouping: electrolytic capacitors also store energy in an electric field, but their oxide dielectric and electrolyte-based construction require separate treatment. The construction principles below begin with an ideal geometry and then consider the limitations of real components. The objective is high capacitance per unit volume, not simply high capacitance at any cost. Electrode resistance, dielectric strength, manufacturing tolerances, insulation margins and the required service life constrain the achievable design.

Capacitance, area and dielectric spacing

For an ideal parallel-plate capacitor with a uniform linear dielectric, capacitance C is given by Eq. (1). Here ε is absolute permittivity, ε₀ is vacuum permittivity, ε_r is relative permittivity, A is overlapping electrode area and d is dielectric thickness. Capacitance is expressed in farads, area in square metres and thickness in metres.

C = \frac{\varepsilon A}{d} = \frac{\varepsilon_{0}\varepsilon_{r}A}{d} \tag{1}

Eq. (1) neglects fringing fields and assumes that the dielectric properties are appropriate to the operating conditions. In nonlinear ceramic dielectrics, the effective capacitance depends on the applied electric field, so a constant-permittivity calculation is only a starting point. [3]

Stacking

Consider six separate capacitor elements, each formed by two electrodes and each having capacitance C. Connected in parallel as illustrated in Figure 1, the twelve electrodes provide a total capacitance of 6C. With an even number N of electrodes arranged as independent pairs, total capacitance C_pair is given by Eq. (2).

C_{\mathrm{pair}} = \frac{N}{2}C \tag{2}

Six separate two-electrode capacitor elements connected in parallel — Figure 1. Six separate capacitor elements provide a total capacitance of 6C.

If the same twelve electrodes are stacked with alternating polarity, each adjacent pair forms an active capacitive gap. There are eleven such gaps, connected electrically in parallel, giving 11C as shown in Figure 2. In general, total stacked capacitance C_stack and the improvement relative to separate pairs follow Eq. (3).

C_{\mathrm{stack}} = (N-1)C, \qquad \frac{C_{\mathrm{stack}}}{C_{\mathrm{pair}}} = 2\left(1-\frac{1}{N}\right) \tag{3}

Twelve alternating-polarity electrodes forming eleven parallel capacitive gaps — Figure 2. A twelve-electrode stack provides eleven active gaps and a total capacitance of 11C.

For this example, the ratio is 11/6, or approximately 1.83. As the electrode count increases, the ratio approaches two because almost every electrode contributes an active surface on both sides. The comparison assumes equal overlap area, dielectric thickness and permittivity in every active gap, while neglecting fringing and external parasitic capacitance.

Winding

A wound capacitor uses two electrode strips separated by dielectric films. The repeating layer arrangement prevents the electrodes from touching when the strips are rolled together. In the interior of the winding, each electrode faces the opposite polarity through dielectric on both sides, as illustrated in Figure 3. [1]

This provides approximately twice the active interface area of an isolated single-gap arrangement using the same strip area. The exact result depends on the winding ends, electrode overlap and inactive margins; it is not an unconditional doubling of a finished component’s capacitance. Wound bodies may remain cylindrical or be flattened to use a rectangular enclosure more efficiently. [1]

Terminations

Metal-foil electrodes can be connected through inserted tabs or through extended-foil connections. Inserted tabs provide discrete collection points along an electrode. Extended-foil construction exposes the electrode edges at opposite ends of the winding so that a broader connection can be made to the external terminals. Figures 4 and 5 accompany these termination arrangements. [1, 2]

Figure 4. Illustration accompanying the termination arrangements.

Extended electrode foils connected at the ends of a capacitor winding — Figure 5. Extended-foil construction.

The joining process must suit the electrode metal, terminal material and internal environment. Welded or soldered end connections are used in appropriate film/foil designs. A dependable electrical joint matters at low signal levels as well as under high current: a nominally contacting surface is not equivalent to a qualified permanent connection. [2]

For pulse and power capacitors, the termination arrangement also affects resistance, inductance and local current density. Compare the complete construction rather than assuming that all capacitors with the same capacitance and voltage rating have equivalent current paths. [1, 2]

Minimized electrode spacing

Eq. (1) shows why thinner dielectric layers increase capacitance for a given electrode area. However, the useful minimum thickness is constrained by mechanical handling, material defects, processing capability and the electric field required in service. It is a property of the particular material and manufacturing process, not a universal minimum for an entire capacitor technology.

Likewise, there is no technology-wide minimum rated voltage that can replace a current catalogue check. For a circuit operating at 6 V DC, a 10 V rating may be one available starting point, but selection still requires assessment of transients, temperature, the manufacturer’s derating guidance and the capacitance available under operating bias. A voltage label alone does not establish suitability. [1, 3]

Dielectric withstand voltage and volume

Increasing the dielectric thickness generally allows a higher applied voltage within the permitted electric field, but reduces capacitance at unchanged area. Rated voltage is nevertheless a component specification, not simply the intrinsic breakdown field multiplied by thickness: construction, temperature, waveform and internal discharge behaviour also matter. [1, 2]

The original fivefold-thickness example illustrates the size penalty. If d increases to 5d while A and ε remain unchanged, capacitance falls to C/5. To restore the original capacitance, the active area must also increase fivefold.

Let Vol_d denote active dielectric volume. In the ideal parallel-plate geometry, Vol_d = Ad. Substituting Eq. (1) gives Eq. (4).

\mathrm{Vol}_{d} = Ad = \frac{Cd^{2}}{\varepsilon} \tag{4}

At constant capacitance and permittivity, fivefold thickness therefore requires twenty-fivefold active dielectric volume. This is not a prediction that the external package must grow by exactly that factor: electrodes, margins, terminals, enclosure and alternative internal arrangements also contribute to finished size. The calculation does explain why retaining capacitance as voltage capability increases carries a substantial volume penalty.

Higher relative permittivity

A higher relative permittivity increases capacitance without increasing area or reducing thickness. Typical values reported for polypropylene and polyester films are approximately 2.2 and 3.2, respectively. These are material comparisons, not guaranteed values for every finished capacitor. [1, 2]

High-permittivity Class 2 ceramics provide greater capacitance density, but their capacitance can decrease under DC bias. Class 1 temperature-compensating ceramics such as C0G do not exhibit the same ferroelectric DC-bias behaviour. For decoupling and power-rail applications, evaluate effective capacitance at operating voltage and temperature; for timing, RF and resonant signal circuits, stability and loss may be more important than maximum nominal capacitance. [3]

Metallization

Metallization replaces a separate metal-foil electrode with a thin conductive coating on a dielectric or carrier film. This reduces the space occupied by electrodes and enables local breakdown clearing, but creates a different balance between volume efficiency, resistance and pulse capability. [2]

Metal foil versus deposited electrodes

In film/foil capacitors, the electrodes are separate metal foils, with dielectric films between them. Foil electrodes provide substantial conducting cross-section and can support demanding pulse-current applications in suitable designs. Their thickness also occupies volume that does not contribute directly to dielectric energy storage. [2]

In metallized-film capacitors, vacuum deposition forms the electrode directly on the dielectric or a separate carrier. Vishay describes deposited electrode thicknesses of approximately 0.02–0.1 µm for this construction. Such layers occupy much less volume than separate foil electrodes, but their electrical resistance and contact integrity require careful design. [2]

Electrode composition is not restricted to aluminum. Aluminum, zinc and suitable metallization combinations are selected according to the application, clearing behaviour, conductivity and environmental protection. Paper-based windings require impregnation, while plastic-film designs may be dry or use an impregnation system according to their construction and duty. Moisture protection remains important because dielectric and electrode condition affect long-term performance. [1, 2, 4]

Vacuum deposition and film handling must avoid damaging the polymer and must produce an adherent, controlled electrode layer. The relevant result for the component engineer is a qualified combination of film, coating and termination process, rather than a universal deposition temperature or cooling-drum setting.

Double-sided metallized carrier films

Some constructions replace separate metal foils with a plastic carrier metallized on both sides. The carrier and the main dielectric have different functions: a polyester carrier, for example, can support the electrodes while polypropylene provides the principal dielectric between opposite polarities. Figure 6 illustrates the construction principle. [2]

Potential advantages include reduced electrode volume, improved current collection compared with a basic single-metallized arrangement, and retention of self-healing behaviour in the appropriate construction. Heavy-edge metallization and mixed film/foil arrangements provide additional options for high-current designs. [2]

These features do not establish a universal pulse ranking. A double-sided metallized capacitor can outperform a conventional single-metallized part while still differing from a dedicated metal-foil pulse capacitor. Compare the actual peak-current, voltage-slope, repetition-rate and thermal specifications. [1, 2]

Self-healing and segmented metallization

Self-healing, also called clearing, occurs when a local dielectric breakdown produces an arc that removes the very thin metallization around the defect. The resulting metal-free region electrically isolates the damaged spot, allowing the remaining active area to continue operating. The dielectric is not restored to its original physical condition. [2]

The outcome depends on the dielectric system, electrode construction and energy available to the event. Each cleared region removes some active electrode area, so repeated events can cause cumulative capacitance loss. Self-healing is a useful construction feature, not proof that a capacitor cannot fail short, overheat or become unsafe under misuse. [2, 4]

Segmented metallization divides the electrode into regions connected through narrow conductive links. Under an appropriate fault event, a link can disconnect the affected region and restrict energy supplied from the surrounding electrode. This is distinct from the small local clearing area of an ordinary self-healing event, although both mechanisms can coexist in one design. [2]

For power and safety-related applications, assess the complete protective construction and the manufacturer’s specified end-of-life behaviour. Neither self-healing nor segmentation replaces voltage derating, thermal design, external protection or the approvals required for the application. [1, 2]

End-spray termination and insulation margins

The metallized layers are commonly connected at opposite ends of the winding or stack by sprayed metal. This process is known as schooping or schoopage. Terminals are then joined to the end contacts. Alternating electrode offsets and uncoated margins prevent connection to the wrong polarity, as illustrated in Figure 7. [1, 2]

Cross-section showing alternating metallized films, insulation margins and end-spray contacts — Figure 7. Section through a wound or stacked capacitor with a metallized dielectric. Proportions are schematic.

Wider active overlap increases capacitance, but adequate margins are needed to maintain insulation and prevent unwanted end-contact penetration. The required dimensions depend on voltage, materials, geometry and process capability. A fixed margin width cannot guarantee insulation resistance or reliability across all capacitor designs.

Some constructions use patterned or interrupted metallization to define the active electrode and its boundaries. The relevant acceptance criteria are the completed component’s electrical performance and qualification, not margin width considered in isolation.

Termination defects can contribute to increased equivalent series resistance, or ESR. Near series resonance, the capacitive and inductive reactances cancel in the simple lumped model, making resistive impedance easier to examine. However, the result includes other capacitor losses and fixture resistance; an elevated value does not uniquely identify a defective end contact. [1, 2, 5]

Before-and-after comparisons following an agreed soldering or qualification exposure can reveal changes, provided frequency, temperature, terminal geometry and fixture compensation remain controlled. Do not apply arbitrary heating to serviceable parts as an informal screening method. Discharge and verify the capacitor before connecting an ordinary impedance or LCR instrument. [5]

Voltage slope and current pulses

A metallized electrode must carry current through a very thin conductive layer and its connection to the end spray. Current collection near this interface can create concentrated heating. If overload damages part of the contact, the remaining conducting area may experience greater stress, leading to further deterioration, capacitance loss or an open connection. [1, 2]

For an approximately constant capacitance, capacitor current equals capacitance multiplied by the time rate of change of the voltage across the capacitive element. Thus a fast voltage transition can produce a large peak current even when the voltage amplitude remains below the DC rating. Manufacturers commonly express the permitted voltage slope as dV/dt in V/µs. [1, 2]

Original equation image accompanying the capacitor-current and voltage-slope discussion — Figure 8. Voltage-slope equation.

Voltage slope is not the same as rise time. Rise time is an interval, while dV/dt is a rate of voltage change. A datasheet’s permitted slope may depend on the voltage excursion and test waveform; apply any manufacturer-specified scaling only under the stated conditions. [1, 2]

Peak current alone is also insufficient for repetitive operation. Pulse duration, waveform, repetition frequency, ambient temperature and cooling determine cumulative heating. Where a supplier specifies a pulse characteristic or pulse-energy-related limit in addition to dV/dt, both must be checked. [1]

For a sinusoidal current in a linear model, AC loss P_AC is given by Eq. (5), where I_RMS is RMS current and ESR(f, T) is equivalent series resistance at frequency f and temperature T. [1, 5]

P_{\mathrm{AC}} = I_{\mathrm{RMS}}^{2}\,\mathrm{ESR}(f,T) \tag{5}

For switching waveforms, losses depend on the current spectrum and the resistance at the relevant frequencies. A single room-temperature ESR value does not establish permissible ripple current. Check the manufacturer’s AC-voltage-versus-frequency curves, thermal limits and actual application temperature rise. [1, 5]

In high-voltage AC service, internal partial discharge or corona can impose a limit before a simple bulk-heating calculation does. Consequently, a high DC rating must not be treated as unrestricted permission for high-frequency AC or resonant operation. [1, 2]

Pulse-grade designs reinforce the current-collection path through suitable end-contact materials, heavy-edge metallization, double-sided electrodes or combinations of foil and metallized film. Figure 9 illustrates a reinforced electrode edge. [2]

Metallized capacitor electrode with a reinforced edge at the end-contact region — Figure 9. Reinforced metallization in a current-pulse capacitor.

The wavy-cut construction in Figure 10 illustrates a way to enlarge the available contact edge. Its benefit depends on the quality of the completed joint and the rest of the current path; the drawing is a construction principle rather than a substitute for a guaranteed pulse rating.

Wavy-cut film edge increasing the available end-contact perimeter — Figure 10. Wavy-cut film edge used to increase the available contact perimeter. Proportions are not to scale.

Metallized stacked capacitors

A stacked-film capacitor contains many small capacitive elements connected in parallel. In suitable constructions, a damaged layer contact can disconnect that layer without propagating the same contact damage through neighbouring elements. The immediate result may be a limited reduction in total capacitance. This construction can provide an advantage in pulse handling over a corresponding wound arrangement. [1]

The circuit conditions matter. If the applied voltage waveform remains unchanged, the current in an undamaged parallel element need not rise merely because another element disconnects. If the external circuit instead maintains total current, or if capacitance loss changes the resonant waveform, the remaining elements can experience different stress. Stacked construction therefore does not make continued overload acceptable.

One production method forms a large master winding, applies end contacts and sections it into individual capacitor bodies. Its large radius makes each small section approximately planar. TDK describes this stacked-film production approach and the resulting parallel-layer construction. Other stacking and winding processes are selected according to the product design. [1]

Design and Selection Checklist

Begin with the circuit function and its operating waveform, then compare complete part specifications. Catalogue capacitance, voltage and dimensions are necessary checks, but they do not establish electrical or mechanical interchangeability.

Define the application class: precision signal, RF, decoupling, DC link, resonant power conversion, snubbing, pulse discharge or mains interference suppression.
Compare effective capacitance, tolerance and drift over operating bias, temperature and frequency. For Class 2 ceramics, include DC-bias reduction rather than relying only on the nominal marking.
Record maximum DC voltage, AC RMS voltage, peak voltage, transient excursions and any permitted voltage reversal. Apply the series-specific temperature derating.
For pulse duty, check permitted dV/dt, peak current, pulse duration, waveform and repetition rate. Include any additional pulse characteristic specified by the manufacturer.
For continuous ripple or resonant duty, check RMS current, frequency-dependent losses, permissible AC voltage and cooling. Validate temperature rise in the intended assembly.
Evaluate equivalent series inductance and mounting-loop geometry. A suitable internal construction cannot compensate for an unsuitable external high-current loop.
Review insulation resistance, dielectric absorption, humidity exposure, encapsulation and permitted parameter changes after qualification or endurance testing.
For catalogue alternatives, verify terminal arrangement, lead spacing, body dimensions, mounting process, soldering limits, approvals and supplier change-control requirements.
For custom capacitors, agree waveform limits, terminal reference planes, cooling conditions, test methods, acceptance limits and allowable capacitance or ESR changes before qualification.
For safety-related positions, confirm the required component class and approvals against the equipment requirements. Self-healing, a high DC rating or a general qualification claim does not replace the required safety approval.

For mains interference suppression, appropriately approved Class X and Class Y capacitors serve different circuit positions and safety functions. Ordinary film capacitors must not be substituted solely because their capacitance or AC voltage rating appears similar. Component approval must also be considered alongside the equipment’s insulation and protective design. [2]

Conclusion

Stacking, winding and metallization improve the use of electrode area and package volume, but each introduces constraints on electric field, current collection and reliability. Thinner dielectrics and higher permittivity increase capacitance density; they do not remove voltage, stability or thermal trade-offs.

For metallized-film capacitors, assess self-healing and contact construction together with the actual voltage and current waveform. Select and qualify a complete component for its intended duty, rather than treating capacitance, voltage rating or construction type as an independent guarantee of performance.

FAQ

These answers summarise the construction and selection distinctions that most directly affect engineering decisions.

What are electrostatic capacitors?

In this article, electrostatic capacitors means conventional dielectric capacitors such as ceramic, plastic-film and paper types. They store energy in an electric field between electrodes separated by a dielectric. The grouping distinguishes their construction from electrolytic and electrochemical technologies; it does not mean that electrolytic capacitors lack electric-field energy storage.

How do stacking and winding increase capacitance?

Both arrangements allow internal electrodes to face the opposite polarity on both sides, increasing active interface area. Twelve alternating electrodes form eleven capacitive gaps, compared with six separate electrode pairs. The comparison assumes equal area, spacing and dielectric properties. Practical windings and stacks also include inactive margins, end effects and termination structures.

What does self-healing mean in a metallized-film capacitor?

A local dielectric breakdown creates an arc that removes thin metallization around the damaged spot, electrically isolating it. The dielectric is not physically restored. The remaining area can continue operating, but repeated clearing reduces capacitance. Segmented electrodes can additionally disconnect affected regions. Neither mechanism permits operation beyond the specified voltage, pulse or thermal limits.

Which ratings matter when selecting a film capacitor for pulse service?

Check voltage excursion, permitted voltage slope, peak current, pulse duration, waveform and repetition rate. Repetitive operation also requires RMS-current and thermal checks under the intended cooling conditions. A DC voltage rating alone does not establish pulse suitability. Use the individual series specifications and any additional pulse characteristic required by the manufacturer.

Can ceramic and film capacitors with the same capacitance and voltage rating be interchanged?

Not without checking the application. Effective capacitance, dielectric loss, inductance, pulse capability, temperature behaviour, mounting and qualification can differ substantially. Class 2 ceramic capacitance can decrease under DC bias, while film constructions have their own contact-current and AC-voltage limits. Mains interference-suppression positions also require the appropriate safety class and approval.

How to Select a Metallized-Film Capacitor for Pulse Duty

Use the operating waveform to screen candidates, then validate the selected construction under the intended electrical and thermal conditions.

Select a metallized-film capacitor by checking the operating waveform, electrical limits, thermal behaviour and qualification.

Define the operating duty
Record the circuit function, maximum voltage excursion, voltage waveform, pulse duration, repetition rate, ambient temperature and cooling arrangement. Include startup, shutdown and credible transient conditions.
Check voltage slope and peak current
Determine the steepest relevant voltage slope and the associated capacitor current. Compare both with the individual datasheet limits and apply only the waveform or voltage scaling explicitly permitted by the manufacturer.
Check repetitive and thermal limits
Evaluate RMS current, frequency-dependent loss, permissible AC voltage and any specified pulse characteristic. Confirm that repetitive pulses do not produce excessive heating under the intended mounting and cooling conditions.
Compare construction and qualification
Review electrode construction, end contacts, capacitance tolerance, insulation, dimensions, terminal arrangement and mounting limits. Confirm the necessary qualification and safety approvals. Agree acceptance conditions with the supplier for custom parts or demanding waveforms.
Validate the selected part in the assembly
Measure the relevant waveform and capacitor temperature in the intended circuit. Compare capacitance and loss measurements before and after the agreed validation exposure under matching conditions. Make the capacitor safe before connecting ordinary component-test instruments.

References

Manufacturer technical information supports the construction and operating-limit guidance. The numbered references also identify the additional material and measurement background used in this article.

TDK Electronics, Film Capacitors: General Technical Information, TDK Electronics, October 2025.
Vishay Roederstein, Film Capacitors: General Technical Information, document 26033, Vishay Intertechnology, revision 24 March 2022.
Murata Manufacturing, Does the capacitance change when a DC voltage is applied to ceramic capacitors?, Capacitors FAQ, Murata Manufacturing, undated.
Passive Components Blog, Film and Foil Organic Dielectric Capacitors: Paper Capacitors, Passive Components Blog, 2026.
Passive Components Blog, ESR of Capacitors, Measurements and Applications, Passive Components Blog, 2026.

Latest technical review and revision: 3 November 2026. Updated construction explanations, dielectric-volume scaling, self-healing, pulse-selection guidance and measurement limitations.