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Modelithics CapV MVP Library: Measurement-Based Models for Varactor Chip Simulation

18.8.2026
Reading Time: 4 mins read
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Modelithics has released the CapV MVP Library, a collection of Microwave Global Models covering varactor chip capacitors, intended for use in mainstream RF and microwave EDA tools.

For engineers designing bias-tunable circuits, the library replaces ideal capacitor assumptions and single-bias S-parameter files with broadband, temperature- and tolerance-aware nonlinear models.

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Key features and benefits

  • Measurement-based accuracy – Each model is built from S-parameter measurements on coplanar waveguide (CPW) feedlines, with the feedline effects de-embedded from the final circuit model, so simulation results reflect real device behavior rather than idealized assumptions.
  • Temperature scaling – Models include a temperature input parameter that predicts capacitance change for a given DC bias and operating temperature, validated against RF/mm-wave measurements at 25 °C and 85 °C.
  • Statistical and tolerance analysis – A built-in tolerance parameter allows use of statistical-analysis functions in supported EDA tools, enabling yield-prediction and tolerance studies before a board is built.
  • Broadband validity – Models are validated from DC up to 67 GHz, covering both DC bias sweeps and frequency sweeps rather than a single operating point.
  • Full documentation – Every model ships with a datasheet listing validity ranges, reference planes, measurement/test fixture details, and model-versus-measurement comparison data.
  • EDA tool compatibility – Models are available for Keysight ADS, Cadence AWR Design Environment, and Keysight RF Synthesis (Genesys).

Typical applications

Varactor chips modeled by this library are used wherever a circuit needs an electronically tunable capacitance, for example in voltage-controlled tuning elements, RF/microwave matching networks, tunable filters, and phase-shifting or oscillator circuits. Because the models extend to 67 GHz, they are relevant for microwave and mm-wave front-end design, not only lower-frequency RF work. Designers working on reconfigurable matching networks or bias-tuned filters can use the temperature and tolerance parameters to check whether performance holds up across real operating and production conditions, rather than only at a nominal design point.

Technical highlights

The initial library, according to the manufacturer brochure, includes three named varactor chip models: a 0.5 pF series-configuration varactor, a 0.5 pF shunt-configuration varactor, and a 2 pF shunt-configuration varactor. Modelithics states that typical error between model and measurement is below 0.1 dB or 10 percent, based on bias sweeps from 0 V to 15 V in 2 V steps at 25 °C.

Model designationCapacitanceConfigurationBias sweep range
CAPV-CPV-0p5pF-SERS-0010.5 pFSeries0 to 15 V
CAPV_CPV_0p5pF_SHNT_0010.5 pFShunt0 to 15 V
CAPV_CPV_2pF_SHNT_0012 pFShunt0 to 15 V

A shunt configuration places the varactor between the signal line and ground, which is typically used for tuning or loading a line, while a series configuration places it directly in the signal path, which is common in tunable matching or coupling networks. The DC bias range covered by the models (0 to 15 V) corresponds to the practical control-voltage range used to sweep varactor capacitance in many RF tuning circuits.

Design-in notes for engineers

  • Treat varactor capacitance as bias-, frequency-, and temperature-dependent rather than as a single fixed value when simulating tunable circuits.
  • Use the temperature-scaling parameter when a design must operate across a wide ambient range, since C-V behavior can shift meaningfully between 25 °C and 85 °C.
  • Run tolerance/statistical analysis early in the design cycle to catch cases where component-to-component variation could push a narrow-band tuned circuit out of specification.
  • Check the model datasheet for the exact reference planes and validated frequency range before applying a model outside its documented conditions.
  • Confirm EDA tool compatibility (ADS, AWR Design Environment, or Genesys) before integrating a model into an existing simulation flow.
  • For designs above the documented 67 GHz ceiling, verify with Modelithics whether an extrapolated or alternative model is appropriate rather than assuming continued accuracy.

Source

This article is based on information published by Modelithics in its official CapV MVP Library brochure describing the varactor chip model collection and its features.

References

  1. Modelithics CapV MVP Brochure (PDF)
  2. Modelithics CapV MVP Library page
  3. Modelithics Advanced Model Features
  4. Modelithics Model Datasheets overview

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